HY5DU561622CT - (HY5DU56xx22CT) 256M-P DDR SDRAM
and is subject to change without notice.
Hynix semiconductor does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Rev.
0.3 / Oct.
2003 HY5DU56422CT-D4/D43 HY5DU56822CT-D4/D43 HY5DU561622CT-D4/D43 DESCRIPTION PRELIMINARY The Hynix HY5DU56422, HY5DU56822
HY5DU561622CT Features
* VDD/VDDQ = 2.5 ~ 2.7V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data s
