ICS541 - PRELIMINARY INFORMATION PLL Clock Divider

ICST

ICS541 Description

www.DataSheet4U.com PRELIMINARY INFORMATION ICS541 PLL Clock Divider .
The ICS541 is a cost effective way to produce a high quality clock output divided from a clock input.

ICS541 Features

* Packaged in 8 pin SOIC
* Low cost clock divider
* Low skew (500ps) outputs. One is ÷ 2 of other.
* Easy to use with other generators and buffers
* Input clock frequency up to 135 MHz at 3.3 V
* Input clock frequency up to 156 MHz at 5.0 V
* T

ICS541 Applications

* Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not auth

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ICS541 Datasheet Preview — Preview of ICS541 PDF

Datasheet Details

Part number: ICS541
Manufacturer: ICST
File Size: 77.44 KB
Datasheet: ICS541_ICST.pdf
Description: PRELIMINARY INFORMATION PLL Clock Divider

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PRELIMINARY INFORMATION PLL Clock Divider ICST

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