ICS9DB108 Datasheet - Integrated Circuit Systems

ICS9DB108 Eight Output Differential Buffer

PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PIN NAME SRC_DIV# VDD GND SRC_IN SRC_IN# OE_0 OE_3 DIF_0 DIF_0# GND VDD DIF_1 DIF_1# OE_1 OE_2 DIF_2 DIF_2# GND VDD DIF_3 DIF_3# BYPASS#/PLL SCLK SDATA PIN TYPE IN PWR PWR IN IN IN IN OUT OUT PWR PWR OUT OUT IN IN OUT OUT PWR PWR O.

ICS9DB108 Features

* 8 - 0.7V current-mode differential output pairs

* Supports zero delay buffer mode and fanout mode

* Bandwidth programming available Key Specifications:

* Outputs cycle-cycle jitter < 50ps

* Outputs skew: 50ps

* +/- 300ppm frequency accuracy on outpu

ICS9DB108 Datasheet (274.17 KB)