SY100S838L Datasheet - Micrel Semiconductor

CLOCK GENERATION CHIP

SY100S838L Features

* 3.3V and 5V power supply options

* 50ps output-to-output skew

* Synchronous enable/disable

* Master Reset for synchronization

* Internal 75KΩ input pull-down resistors

* Available in 20-pin SOIC package TRUTH TABLE CLK EN ZL ZZ H XX NOTES: Z = LOW-to-HIGH transition

SY100S838L General Description

The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The devices can be driven by either a diffe.

SY100S838L Datasheet (504.05 KB)

SY100S838L Datasheet Preview — Preview of SY100S838L PDF

Datasheet Details

Part number:

SY100S838L

Manufacturer:

Micrel Semiconductor

File Size:

504.05 KB

Description:

Clock generation chip.
Micrel, Inc. NOT RECOMMENDED FOR NEW DESIGNS (÷1, ÷2/3) OR (÷2, ÷4/6) CLOCK GENERATION CHIP Precision Edge® Precision SEYd1g00eS®838 SY1S0Y01S008S38.

📁 Related Datasheet

SY100S838 CLOCK GENERATION CHIP (Micrel Semiconductor)

SY100S834 Clock Generation Chip (Micrel Semiconductor)

SY100S834L Clock Generation Chip (Micrel Semiconductor)

SY100S839V CLOCK GENERATION CHIP (Micrel Semiconductor)

SY100S811 SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL (Micrel Semiconductor)

SY100S815 SINGLE SUPPLY QUAD PECL/TTL-TO-PECL (Micrel Semiconductor)

SY100S863 8-Input Pecl Differential Mux (Micrel Semiconductor)

SY100S891 5-BIT Registered Transceiver (Micrel Semiconductor)

SY100S301 Triple 5-INPUT OR/NOR GATE (Micrel Semiconductor)

SY100S302 Quint 2-INPUT OR/NOR GATE (Micrel Semiconductor)

TAGS

SY100S838L CLOCK GENERATION CHIP Micrel Semiconductor

Image Gallery

SY100S838L Features

SY100S838L General Description

Datasheet Details

File Size:

Description:

SY100S838L Distributor