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DS99R104, DS99R103 (DS99R103 / DS99R104) DC-Balanced 24-Bit LVDS Serializer and Deserializer

DS99R104 Description

DS99R103/DS99R104 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer April 2007 DS99R103/DS99R104 3-40MHz DC-Balanced 24-Bit LVDS Serialize.
The DS99R103/104 Chipset translates a 24-bit parallel bus into a fully transparent data/control LVDS serial stream with embedded clock information.

DS99R104 Features

* pre-emphasis to boost signals over longer distances using lossy cables. Internal DC balanced encoding/decoding is used to support AC-Coupled interconnects.
* Internal DC Balancing encode/decode
* Supports AC

DS99R104 Applications

* LOCK output flag to ensure data integrity at Receiver side Balanced TSETUP/THOLD between RCLK and RDATA on Receiver side PTO (progressive turn-on) LVCMOS outputs to reduce EMI and minimize SSO effects All LVCMOS inputs and control pins have internal pulldown On-chip filters for PLLs on Transmitter a

📥 Download Datasheet

This datasheet PDF includes multiple part numbers: DS99R104, DS99R103. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
DS99R104, DS99R103
Manufacturer
National Semiconductor
File Size
913.87 KB
Datasheet
DS99R103_NationalSemiconductor.pdf
Description
(DS99R103 / DS99R104) DC-Balanced 24-Bit LVDS Serializer and Deserializer
Note
This datasheet PDF includes multiple part numbers: DS99R104, DS99R103.
Please refer to the document for exact specifications by model.

📁 Related Datasheet

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📌 All Tags

DS99R103 DS99R104 DC-Balanced 24-Bit LVDS Serializer and Deserializer National Semiconductor
National Semiconductor DS99R104-like datasheet