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NB6L14S 2.5V 1:4 AnyLevel Differential Input to LVDS Fanout Buffer/Translator

NB6L14S Description

NB6L14S 2.5 V 1:4 AnyLevel] Differential Input to LVDS Fanout Buffer/Translator The NB6L14S is a differential 1:4 Clock or Data Receiver and will acc.
Pin Name I/O Description 1 Q1 LVDS Output Non. inverted IN output.

NB6L14S Features

* Maximum Input Clock Frequency > 2.0 GHz
* Maximum Input Data Rate > 2.5 Gb/s
* 1 ps Maximum of RMS Clock Jitter
* Typically 10 ps of Data Dependent Jitter
* 380 ps Typical Propagation Delay
* 120 ps Typical Rise and Fall Times
* Single Power

NB6L14S Applications

* The NB6L14S has a wide input common mode range from GND + 50 mV to VCC
* 50 mV. Combined with the 50 W internal termination resistors at the inputs, the NB6L14S is ideal for translating a variety of differential or single
* ended Clock or Data signals to 350 mV typical LVDS output lev

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2.5V AnyLevel Differential Input LVDS Fanout Buffer Translator ON Semiconductor
ON Semiconductor NB6L14S-like datasheet