PLL650-08 Datasheet (PhaseLink) - Network LAN Clock Source

PLL650-08, Network LAN Clock Source

The PLL 650-08 is a low cost, low jitter, and high performance clock synthesizer.

With PhaseLink’s proprietary analog Phase Locked Loop techniques, the chip accepts 25MHz crystal, and produces multiple output clocks for networking chips, and ASICs.

BLOCK DIAGRAM XIN XOUT XTAL OSC w w w t a .

PLL650-08 Features

* w w Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub-micron CMOS processes. 25MHz fundamental crystal or clock input. 1 output fixed at 100MHz , 1 ou