PLL650-09 Datasheet (PhaseLink) - Low Cost Network LAN Clock

PLL650-09, Low Cost Network LAN Clock

The PLL 650-09 is a low cost, low jitter, and high performance clock synthesizer.

With PhaseLink’s proprietary analog Phase Locked Loop techniques, the chip accepts 25.0 MHz crystal, and produces multiple output clocks for networking chips.

50MHz BLOCK DIAGRAM XIN XOUT XTAL OS C w w w .D t

PLL650-09 Features

* w w Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub-micron CMOS processes. 25MHz fundamental crystal or clock input. 4 outputs fixed at 50MHz . Zero