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PLL650-10

Network LAN Clock

PLL650-10 Features

* w w Full CMOS output swing with 40-mA output drive capability. 25-mA output drive at TTL level. Advanced, low power, sub-micron CMOS processes. 25MHz fundamental crystal or clock input. Two outputs fixed at 125MHz.. Z

PLL650-10 General Description

The PLL 650-10 is a low cost, low jitter, and high performance clock synthesizer. With PhaseLink’s proprietary analog Phase Locked Loop techniques, the chip accepts 25MHz crystal, and produces multiple output clocks for networking chips, and ASICs. BLOCK DIAGRAM XIN XO UT XTAL OS C w w w .D .

PLL650-10 Datasheet (347.46 KB)

Preview of PLL650-10 PDF

Datasheet Details

Part number:

PLL650-10

Manufacturer:

PhaseLink

File Size:

347.46 KB

Description:

Network lan clock.

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TAGS

PLL650-10 Network LAN Clock PhaseLink

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