Description
PRELIMINARY KM732V595A/L Document Title 32Kx32-Bit Synchronous Pipelined Burst SRAM, 3.3V Power, 2.5V I/O Datasheets for 100TQFP 32Kx32 Synchronous S.
The KM732V595A/L is a 1,048,576 bit Synchronous Static Random Access Memory designed for high performance second level cache of Pentium and Power PC b.
Features
* Synchronous Operation. 2 Stage Pipelined operation with 4 Burst. On-Chip Address Counter. Self-Timed Write Cycle. On-Chip Address
Applications
* GW, BW, LBO, ZZ. Write cycles are internally self-timed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high. And with CS1 high, ADSP is blocked to control signals. Burst cycle can be initiated with either the address
