K4S160822D - 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL

Samsung semiconductor

Datasheet Details

The K4S160822D is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 1,048,576 words by 8 bits, fabricated with

JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs -. CAS latency ( 2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst read single-bit write operation DQM for masking Auto & self refresh 15.6us refresh duty cycle(2K/32ms) CMOS SDRAM.

📁 K4S160822D Similar Datasheet

K4S1G0632D - SDRAM stacked 1Gb D-die (Samsung Electronics)
K4S1G0732D - SDRAM stacked 1Gb D-die (Samsung Electronics)
K4S280432I - JEDEC standard 3.3V power supply LVTTL compatible (Samsung Semiconductor)
K4S280832B - 128M-bit SDRAM (Samsung Electronics)
K4S280832I - JEDEC standard 3.3V power supply LVTTL compatible (Samsung Semiconductor)
K4S281632I - JEDEC standard 3.3V power supply LVTTL compatible (Samsung Semiconductor)
K4S281632K - 128Mb K-die SDRAM (Samsung)
K4S510432D - 512Mb D-die SDRAM (Samsung)

Other Datasheets by Samsung semiconductor

Published: Apr 7, 2005 |