K4S160822D Datasheet (Samsung semiconductor) - 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL

K4S160822D, 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL

The K4S160822D is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 1,048,576 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock c

K4S160822D Features

* JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs -. CAS latency ( 2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled