K4S161622D - 512K x 16Bit x 2 Banks Synchronous DRAM

Samsung semiconductor

Datasheet Details

The K4S161622D is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 524,288 words by 16 bits, fabricated with

3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs -. CAS Latency ( 2 & 3) -. Burst Length (1, 2, 4, 8 & full page) -. Burst Type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst Read Single-bit Write operation DQM for masking Auto & self refresh 15.6us refresh duty cycle (2K/32ms) CMOS SDRAM.

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Published: Apr 7, 2005 |