K4S281632B-N Datasheet (Samsung semiconductor) - 2M x 16Bit x 4 Banks Synchronous DRAM in sTSOP

K4S281632B-N, 2M x 16Bit x 4 Banks Synchronous DRAM in sTSOP

The K4S281632B-N is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG′s high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clo

K4S281632B-N Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs - CAS latency (2 & 3) - Burst length (1, 2, 4, 8 & Full page) - Burst type (Sequential & Interleave)

* All inputs are sa