K4S510732B Datasheet - Samsung semiconductor

K4S510732B Stacked 512Mbit SDRAM

The K4S510732B is 536,870,912 bits synchronous high data rate Dynamic RAM organized as 4 x 16,777,216 words by 8 bits, fabricated with SAMSUNG's high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock.

K4S510732B Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave)

* All inputs are

K4S510732B_Samsungsemiconductor.pdf