KM681002CL - 128Kx8 Bit High-Speed CMOS Static RAM
The KM681002C is a 1,048,576-bit high-speed Static Random Access Memory organized as 131,072 words by 8 bits.
The KM681002C uses 8 common input and output lines and has an output enable pin which operates faster than address access time at read cycle.
The device is fabricated using SAMSUNG′s advance
PRELIMINARY KM681002C/CL, KM681002CI/CLI Document Title 128Kx8 Bit High-Speed CMOS Static RAM(5V Operating).
Operated at Commercial and Industrial Temperature Ranges.
CMOS SRAM Revision History Rev.
No.
Rev.
0.0 Rev.
1.0 History Initial release with Preliminary.
Release to Final Data Sheet.
1.1.
Delete Preliminary.
2.2.
Added Data Retention Characteristics.
Add 10ns part.
Draft Data Aug.
5.
1998 Mar.
3.
1999 Remark Preliminary Final www.DataSheet4U.com Rev.
2.0 Mar.
3.
2000 Final The attac
KM681002CL Features
* Fast Access Time 10,12,15,20ns(Max.)
* Low Power Dissipation Standby (TTL) : 30mA(Max.) (CMOS) : 5mA(Max.) 0.5mA(Max.) L-ver. only Operating KM681002C/CL-10 : 80mA(Max.) KM681002C/CL-12 : 75mA(Max.) KM681002C/CL-15 : 73mA(Max.) KM681002C/CL-20 : 70mA(Max.)
* Single 5.0V±10%
