HYB39S16160CT-10, HYB39S16160CT-8 Datasheet (Siemens Semiconductor)

HYB39S16160CT-10, HYB39S16160CT-8, 16 MBit Synchronous DRAM

Pin Names CLK CKE CS RAS CAS WE A0 - A10 A11 (BS) Clock Input Clock Enable Chip Select Row Address Strobe Column Address Strobe Write Enable Address Inputs Bank Select DQ DQM, LDQM, UDQM Data Input /Output Data Mask Power (+ 3.3 V) Ground Power for DQ’s (+ 3.3 V) Ground for DQ’s Not connected VDD

www.DataSheet4U.com 16 MBit Synchronous DRAM HYB 39S16400/800/160CT-8/-10 High Performance: -8 -10 100 10 7 12 8 Units MHz ns ns ns ns fCK(MAX.) tCK3 tAC3 tCK2 tAC2 125 8 6 10 6 Multiple Burst Read with Single Write Operation Automatic and Controlled Precharge Command Data Mask for Read/Write control Dual Data Mask for byte control (× 16) Auto Refresh (CBR) and Self Refresh Suspend Mode and Power Down Mode 409

HYB39S16160CT-10 Features

* Bit Synchronous DRAM Operation Definition All of SDRAM operations are defined by states of control signals CS, RAS,