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TC74HC279AF Datasheet - Toshiba

TC74HC279AF Quad S-R Latch

TC74HC279AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC279AP, TC74HC279AF Quad S -R Latch The TC74HC279A is a high speed CMOS QUAD S-R LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Each latch has an independent Q output and Set and Reset inputs. S and R are active low. When S input is low, the Q output goes high and when R input is low, the Q output .

TC74HC279AF Features

* High speed: tpd = 12 ns (typ.) at VCC = 5 V

* Low power dissipation: ICC = 2 μA (max) at Ta = 25°C

* High noise immunity: VNIH = VNIL = 28% VCC (min)

* Symmetrical output impedance: |IOH| = IOL = 4 mA (min)

* Balanced propagation delays: tpLH ∼

* tpHL

TC74HC279AF Datasheet (251.21 KB)