* High speed: tpd = 12 ns (typ.) at VCC = 5 V
* Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
* High noise immunity: VNIH = VNIL = 28% VCC (min)
* Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
* Balanced propagation delays: tpLH ∼
* tpHL
TC74HC279AP Datasheet (251.21 KB)
TC74HC279AP
251.21 KB
Quad s-r latch.
TC74HC279AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC279AP, TC74HC279AF
Quad S -R Latch
The TC74HC279A is a high speed CMO.
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