XC9500XL Datasheet - Xilinx

XC9500XL, High-Performance CPLD

k 0 R XC9500XL High-Performance CPLD Family Data Sheet DS054 (v2.5) May 22, 2009 0 0 Product Specification .
Each XC9500XL device is a subsystem consisting of multiple Function Blocks (FBs) and I/O Blocks (IOBs) fully interconnected by the FastCONNECT II swit.

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Datasheet Details

Part number:

XC9500XL

Manufacturer:

Xilinx

File Size:

214.10 KB

Description:

High-Performance CPLD

Features

* Optimized for high-performance 3.3V systems - 5 ns pin-to-pin logic delays, with internal system frequency up to 208 MHz - Small footprint packages including VQFPs, TQFPs and CSPs (Chip Scale Package) - Pb-free available for all packages - Lower power operation - 5V tolerant I/O pins accep

Applications

* in leading-edge communications and computing systems, where high device reliability and low power dissipation is important. Each XC9500XL device supports in-system programming (ISP) and the full IEEE Std 1149.1 (JTAG) boundary-scan, allowing superior debug and design iteration capability for small f

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