XC95144XL - High Performance CPLD

Product Overview

Xilinx

Part number	XC95144XL
Manufacturer	Xilinx
File Size	190.45 KB
Description	High Performance CPLD
Datasheet	XC95144XL Datasheet
Additional preview pages of the XC95144XL datasheet.

5 ns pin-to-pin logic delays.
System frequency up to 178 MHz.
144 macrocells with 3,200 usable gates.
Available in small footprint packages - 100-pin TQFP (81 user I/O pins) - 144-pin TQFP (117 user I/O pins) - 144-CSP (117 user I/O pins) - Pb-free available for all packages.
Optimized for high-performance 3.3V systems - Low power operation - 5V tolerant I/O pins accept 5V, 3.3V, and 2.5V signals - 3.3V or 2.5V output capability - Advanced 0.35 micro.

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Published: Apr 16, 2005 |