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CDCLVD2104 Dual 1:4 Low Additive Jitter LVDS Buffer

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Description

CDCLVD2104 www.ti.com SCAS903A * JUNE 2010 * REVISED AUGUST 2010 Dual 1:4 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2.
The CDCLVD2104 clock buffer distributes two clock inputs (IN0, IN1) to a total of 8 pairs of differential LVDS clock outputs (OUT0, OUT7).

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Features

* 1
* Dual 1:4 Differential Buffer
* Low Additive Jitter

Applications

* Telecommunications/Networking
* Medical Imaging
* Test and Measurement Equipment
* Wireless Communications

CDCLVD2104 Distributors

📁 Related Datasheet

CDCLD080 CDCLD100 CDCLD120 CDCLD200 CDCLD400 CDCLD500

📌 All Tags

CDCLVD2104 Dual Low Additive Jitter LVDS Buffer Texas Instruments
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