74AUP2G3404
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Low-power buffer and inverter. The 74AUP2G3404 is a single buffer and single inverter. Schmitt trigger action at all inputs makes the circuit tolerant of slower inp
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74AUP2G3404 - BUFFER AND INVERTER
(Diodes)
74AUP2G3404
BUFFER AND INVERTER
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life .
74AUP2G3407 - Low-power single buffer
(nexperia)
74AUP2G3407
Low-power single buffer; single buffer with open-drain
Rev. 3 — 10 February 2022
Product data sheet
1. General description
The 74AUP2G.
74AUP2G34 - DUAL BUFFERS
(Diodes)
ADAVDAVANCNECDE ID INFNFORORMAMTAITIOONN
74AUP2G34
DUAL BUFFERS
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low.
74AUP2G34 - Low-power dual buffer
(NXP)
.
74AUP2G34 - Low-power dual buffer
(nexperia)
74AUP2G34
Low-power dual buffer
Rev. 8 — 31 January 2022
Product data sheet
1. General description
The 74AUP2G34 is a dual buffer. Schmitt-trigger a.
74AUP2G32 - DUAL OR GATE
(Diodes)
NEW PRODUCT
74AUP2G32
DUAL OR GATE
Description
Pin Assignments
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and .
74AUP2G32 - Low-power Dual 2-input OR Gate
(NXP)
74AUP2G32
Low-power dual 2-input OR gate
Rev. 7 — 23 January 2013
Product data sheet
1. General description
The 74AUP2G32 provides dual 2-input OR f.
74AUP2G32 - Low-power dual 2-input OR gate
(nexperia)
74AUP2G32
Low-power dual 2-input OR gate
Rev. 9 — 24 June 2022
Product data sheet
1. General description
The 74AUP2G32 is a dual 2-input OR gate. Sc.
74AUP2G38 - Low Power Dual 2-Input NAND Gate
(NXP)
..
74AUP2G38
Low-power dual 2-input NAND gate (open-drain)
Rev. 01 — 16 October 2006 Product data sheet
1. General description
The .
74AUP2G38 - Low-power dual 2-input NAND gate
(nexperia)
74AUP2G38
Low-power dual 2-input NAND gate; open drain
Rev. 10 — 3 December 2020
Product data sheet
1. General description
The 74AUP2G38 provides .
