Datasheet4U Logo Datasheet4U.com

74AUP2G58

Low-power dual PCB configurable multiple function gate

74AUP2G58 Features

* Wide supply voltage range from 0.8 V to 3.6 V

* High noise immunity

* ESD protection:

* HBM JESD22-A114F exceeds 5000 V

* MM JESD22-A115-A exceeds 200 V

* CDM JESD22-C101E exceeds 1000 V

* Low static power consumption; ICC = 0.9 μA (maximum)

74AUP2G58 General Description

The 74AUP2G58 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND. This.

74AUP2G58 Datasheet (267.34 KB)

Preview of 74AUP2G58 PDF

Datasheet Details

Part number:

74AUP2G58

Manufacturer:

nexperia ↗

File Size:

267.34 KB

Description:

Low-power dual pcb configurable multiple function gate.

📁 Related Datasheet

74AUP2G57 - Low-power dual PCB configurable multiple function gate (nexperia)
74AUP2G57 Low-power dual PCB configurable multiple function gate Rev. 3 — 7 May 2021 Product data sheet 1. General description The 74AUP2G57 is a .

74AUP2G00 - Low-power dual 2-input NAND gate (NXP)
74AUP2G00 Low-power dual 2-input NAND gate Rev. 8 — 5 February 2013 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NA.

74AUP2G00 - DUAL NAND GATE (Diodes)
NEW PRODUCT 74AUP2G00 DUAL NAND GATE Description Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power an.

74AUP2G00 - Low-power dual 2-input NAND gate (nexperia)
74AUP2G00 Low-power dual 2-input NAND gate Rev. 11 — 9 June 2022 Product data sheet 1. General description The 74AUP2G00 provides dual 2-input NAND .

74AUP2G00-Q100 - Low-power dual 2-input NAND gate (nexperia)
74AUP2G00-Q100 Low-power dual 2-input NAND gate Rev. 2 — 9 June 2022 Product data sheet 1. General description The 74AUP2G00-Q100 provides dual 2-in.

74AUP2G02 - DUAL NOR GATE (Diodes)
NEW PRODUCT 74AUP2G02 DUAL NOR GATE Description Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and.

74AUP2G02 - Low-power Dual 2-input NOR Gate (NXP)
74AUP2G02 Low-power dual 2-input NOR gate Rev. 7 — 4 February 2013 Product data sheet 1. General description The 74AUP2G02 provides a dual 2-input N.

74AUP2G02 - Low-power dual 2-input NOR gate (nexperia)
74AUP2G02 Low-power dual 2-input NOR gate Rev. 9 — 27 July 2021 Product data sheet 1. General description The 74AUP2G02 is a dual 2-input NOR gate. .

TAGS

74AUP2G58 Low-power dual PCB configurable multiple function gate nexperia

Image Gallery

74AUP2G58 Datasheet Preview Page 2 74AUP2G58 Datasheet Preview Page 3

74AUP2G58 Distributor