9FGL02 Description
The 9FGL02 devices are 3.3V members of IDT's 3.3V Full-Featured PCIe family. The devices have 2 output enables for clock management and support 2 different spread spectrum levels in addition to spread off. The 9FGL02 supports PCIe Gen1-4 mon Clocked architectures (CC) and PCIe Separate Reference no-Spread (SRnS) and Separate Reference Independent Spread (SRIS) clocking architectures.
9FGL02 Key Features
- 100 MHz Low-Power HCSL (LP-HCSL) DIF pairs
- 9FGL0241 default ZOUT = 100
- 9FGL0251 default ZOUT = 85
- 9FGL02P1 factory programmable defaults
- 3.3V LVCMOS REF output w/Wake-On-LAN (WOL)
- Easy AC-coupling to other logic families, see IDT