Part Number | Description | Manufacture |
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LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP |
STMicroelectronics |
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16-bit registered driver • Wide supply voltage range of 1.2 V to 3.6 V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 24 mA at 3.0 V • MULTIBYTETM flow-through standard pin-out architecture • Low in |
NXP |
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18-bit bus-interface D-type flip-flop • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A. • CMOS low power consumption • Direct interface with TTL levels • Current drive ± 24 mA at 3.0 V • Multibyte™flow-through standard pin-out architecture • Low induct |
NXP |
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2.5V/3.3V 16-bit D-type transparent latch • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple VCC and ground pins for minimum noise and ground boun |
NXP |
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16-bit bus transceiver/register • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • MULTIBYTETM flow-through pin-out architecture • Low inductance, multiple VCC and ground pins for minimum noise and ground bounce minimum value of the resistor is determined by t |
NXP |
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18-bit universal bus transceiver and benefits • CMOS low power consumption • MultiByte flow-through standard pin-out architecture • Low inductance multiple VCC and GND pins for minimum noise and ground bounce • Direct interface with TTL levels (2.7 V to 3.6 V) • Bus hold on data inp |
nexperia |
|
18-bit registered driver and benefits • Wide supply voltage range from 1.2 V to 3.6 V • CMOS low-power consumption • Direct interface with TTL levels • Current drive ± 24 mA at 3.0 V • MULTIBYTE flow-through standard pin-out architecture • Low inductance multiple VCC and GN |
nexperia |
|
Quad 2-input NOR gate • Wide supply voltage range from 1.65 to 3.6 V • 3.6 V tolerant inputs/outputs • CMOS low power consumption • Direct interface with TTL levels (2.7 to 3.6 V) • Power-down mode • Latch-up performance exceeds 250 mA • Complies with JEDEC standard: JESD |
NXP |
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Low Voltage 16-Bit Buffer/Line Driver s 1.65V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s 26Ω series resistors in outputs s tPD 3.8 ns max for 3.0V to 3.6V VCC 4.3 ns max for 2.3V to 2.7V VCC 7.6 ns max for 1.65V to 1.95V VCC s Power-off high impedance inputs and ou |
Fairchild Semiconductor |
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16-bit transceiver two output enable inputs (pins nOE) for easy cascading and two send or receive inputs (pins nDIR) for direction control. Pins nOE control the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one |
NXP |
Total 528 results |