SN54HC109, SN74HC109 SCLS470C – MARCH 2003 – R.
Philips
74HC109 - Dual JK flip-flop
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 .
Texas Instruments
CD74HC109 - Dual J-K Flip-Flop
Data sheet acquired from Harris Semiconductor SCHS140E March 1998 - Revised October 2003 CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Dual J-K Flip-F.
Toshiba
TC74HC109AF - Dual J-K Flip-Flop
TC74HC109AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP, TC74HC109AF Dual J-K Flip-Flop with Preset and Clear The TC74H.
Toshiba
TC74HC109AFN - DUAL J-K FLIP-FLOP
TC74HC109AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP, TC74HC109AF Dual J-K Flip-Flop with Preset and Clear The TC74H.
KODENSHI KOREA
KK74HC109A - Dual J-K Flip-Flop
TECHNICAL DATA KK74HC109A Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The KK74HC109A is identical in pinout to the LS/A.
nexperia
74HC109D - Dual JK flip-flop
74HC109; 74HCT109 Dual JK flip-flop with set and reset; positive-edge-trigger Rev. 5 — 5 August 2021 Product data sheet 1. General description The.
Texas Instruments
SN74HC109N - DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
SN54HC109, SN74HC109 SCLS470C – MARCH 2003 – REVISED JUNE 2022 SNx4HC109 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 1 Features.
Texas Instruments
SN74HC109 - DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS
SN54HC109, SN74HC109 SCLS470C – MARCH 2003 – REVISED JUNE 2022 SNx4HC109 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 1 Features.
Texas Instruments
74HC109 - Dual J-K Positive-Edge-Triggered Flip-Flops
SN54HC109, SN74HC109 SCLS470C – MARCH 2003 – REVISED JUNE 2022 SNx4HC109 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 1 Features.
Hitachi Semiconductor
HD74HC109 - Dual J-K Flip-Flops
HD74HC109 Dual J-K Flip-Flops (with Preset and Clear) Description Each flip-flop has independent J, K , preset, clear and clock inputs and Q and Q ou.
Renesas
HD74HC109 - Dual J-K Flip-Flops
HD74HC109 Dual J-K Flip-Flops (with Preset and Clear) REJ03D0561-0200 (Previous ADE-205-434) Rev.2.00 Oct 11, 2005 Description Each flip-flop has i.
nexperia
74HC109 - Dual JK flip-flop
74HC109; 74HCT109 Dual JK flip-flop with set and reset; positive-edge-trigger Rev. 5 — 5 August 2021 Product data sheet 1. General description The.
System Logic Semiconductor
SL74HC109 - Dual J-K Flip-Flop with Set and Reset
SL74HC109 Dual J -K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS The SL74HC109 is identical in pinout to the LS/ALS109. The device .
IK Semiconductor
IN74HC109A - Dual J-K Positive-Edge-Triggered Flip-Flop
TECHNICAL DATA Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS IN74HC109A The IN74HC109A is identical in pinout to the LS/.
Toshiba
TC74HC109AP - Dual J-K Flip-Flop
TC74HC109AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC109AP, TC74HC109AF Dual J-K Flip-Flop with Preset and Clear The TC74H.
Semi Processes
SP74HC109 - Flip Flops
www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com www.
nexperia
74HC109-Q100 - Dual JK flip-flop
74HC109-Q100; 74HCT109-Q100 Dual JK flip-flop with set and reset; positive-edge-trigger Rev. 2 — 1 April 2020 Product data sheet 1. General descri.
STMicroelectronics
M74HC109 - DUAL J-K FLIP FLOP
M74HC109 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR s HIGH SPEED : fMAX = 67MHz (TYP.) at VCC = 6V s LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C .