INTEGRATED CIRCUITS DATA SHEET For a complete dat.
74HCT109 - Dual JK flip-flop
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 .74HCT109 - Dual JK flip-flop
74HC109; 74HCT109 Dual JK flip-flop with set and reset; positive-edge-trigger Rev. 5 — 5 August 2021 Product data sheet 1. General description The.SL74HCT10 - Triple 3-Input NAND Gate
SL74HCT10 Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The SL74HCT10 is identical in pinout to the LS/ALS10. The SL74HCT10 may be used.M74HCT10 - TRIPLE 3-INPUT NAND GATE
M74HCT10 TRIPLE 3-INPUT NAND GATE s HIGH SPEED: tPD = 14ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C COMPATIBLE WITH TTL.74HCT10 - Triple 3-input NAND gate
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 .74HCT107 - Dual JK flip-flop
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 .IN74HCT109A - Dual J-K Positive-Edge-Triggered Flip-Flop
TECHNICAL DATA IN74HCT109A Dual J-K Flip-Flop with set and Reset High-Performance Silicon-Gate CMOS The IN74HCT109A is identical in pinout to the LS/.IN74HCT10A - Triple 3-Input NAND Gate
TECHNICAL DATA IN74HCT10A Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The IN74HCT10A is identical in pinout to the LS/ALS10. The IN7.KK74HCT109A - Dual J-K Flip-Flop
TECHNICAL DATA KK74HCT109A Dual J-K Flip-Flop with set and Reset High-Performance Silicon-Gate CMOS The KK74HCT109A is identical in pinout to the LS/.KK74HCT10A - Triple 3-Input NAND Gate
TECHNICAL DATA KK74HCT10A Triple 3-Input NAND Gate High-Performance Silicon-Gate CMOS The KK74HCT10A is identical in pinout to the LS/ALS10. The KK7.74HCT10 - Triple 3-input NAND gate
74HC10; 74HCT10 Triple 3-input NAND gate Rev. 4 — 8 January 2021 Product data sheet 1. General description The 74HC10; 74HCT10 is a triple 3-input N.74HCT107 - Dual JK flip-flop
74HC107; 74HCT107 Dual JK flip-flop with reset; negative-edge trigger Rev. 7 — 20 February 2024 Product data sheet 1. General description The 74HC.74HCT10-Q100 - Triple 3-input NAND gate
74HC10-Q100; 74HCT10-Q100 Triple 3-input NAND gate Rev. 2 — 8 January 2021 Product data sheet 1. General description The 74HC10-Q100; 74HCT10-Q100 .74HCT107-Q100 - Dual JK flip-flop
74HC107-Q100; 74HCT107-Q100 Dual JK flip-flop with reset; negative-edge trigger Rev. 3 — 7 July 2021 Product data sheet 1. General description The.74HCT109-Q100 - Dual JK flip-flop
74HC109-Q100; 74HCT109-Q100 Dual JK flip-flop with set and reset; positive-edge-trigger Rev. 2 — 1 April 2020 Product data sheet 1. General descri.CD74HCT109 - Dual J-K Flip-Flop
Data sheet acquired from Harris Semiconductor SCHS140E March 1998 - Revised October 2003 CD54HC109, CD74HC109, CD54HCT109, CD74HCT109 Dual J-K Flip-F.CD74HCT107 - Dual J-K Flip-Flop
Data sheet acquired from Harris Semiconductor SCHS139D March 1998 - Revised October 2003 CD54HC107, CD74HC107, CD74HCT107 Dual J-K Flip-Flop with Res.74HCT109D - Dual JK flip-flop
74HC109; 74HCT109 Dual JK flip-flop with set and reset; positive-edge-trigger Rev. 5 — 5 August 2021 Product data sheet 1. General description The.74HCT107D - Dual JK flip-flop
74HC107; 74HCT107 Dual JK flip-flop with reset; negative-edge trigger Rev. 7 — 20 February 2024 Product data sheet 1. General description The 74HC.74HCT10D - Triple 3-input NAND gate
74HC10; 74HCT10 Triple 3-input NAND gate Rev. 4 — 8 January 2021 Product data sheet 1. General description The 74HC10; 74HCT10 is a triple 3-input N.