74LS109 Datasheet | Specifications & PDF Download

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74LS109 Dual J-K Flip-Flop

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Texas Instruments

SN74LS109A - Dual J-K Positive-Edge-Triggered Flip-Flops

PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device JM38510/30109BEA Status Package Type Package Pins Package .
Rating: 1 (8 votes)
Hitachi Semiconductor

HD74LS109 - Dual J-K Positive-edge-triggered Flip-Flops

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hit.
Rating: 1 (5 votes)
Motorola

SN74LS109A - DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP

DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS109A consists of two high speed completely independent transition clocked JK flip-flops. The c.
Rating: 1 (5 votes)
ON Semiconductor

74LS109A - LOW POWER SCHOTTKY

www.DataSheet4U.com SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop The SN74LS109A consists of two high speed completely independent transition .
Rating: 1 (5 votes)
Agere Systems

74LS109 - Dual J-K Flip-Flop

www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com .
Rating: 1 (5 votes)
Hitachi Semiconductor

HD74LS109A - Dual J-K Positive-edge-triggered Flip-Flops

19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hit.
Rating: 1 (4 votes)
Fairchild Semiconductor

DM74LS109A - Dual Positive-Edge-Triggered J-K Flip-Flop

DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs June 1986 Revised March 2000 DM74LS109A Dual Pos.
Rating: 1 (4 votes)
National Semiconductor

DM74LS109A - Dual Positive-Edge-Triggered J-K Flip-Flops

54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs June 1989 54LS109 DM54LS109A D.
Rating: 1 (4 votes)
Texas Instruments

74LS109A - Dual J-K Positive-Edge-Triggered Flip-Flops

www.ti.com PACKAGE OPTION ADDENDUM 4-Dec-2021 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan (1) Drawi.
Rating: 1 (4 votes)
ON Semiconductor

SN74LS109 - LOW POWER SCHOTTKY

SN74LS109A Dual JK Positive Edge-Triggered Flip-Flop The SN74LS109A consists of two high speed completely independent transition clocked JK flip-flops.
Rating: 1 (3 votes)
ON Semiconductor

SN74LS109A - Dual JK Positive Edge-Triggered Flip-Flop

SN74LS109A Dual JK Positive Edge−Triggered Flip−Flop The SN74LS109A consists of two high speed completely independent transition clocked JK flip-flops.
Rating: 1 (2 votes)
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