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Fairchild Semiconductor Electronic Components Datasheet

BSS123 Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

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June 2003
BSS123
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode field effect
transistors are produced using Fairchild’s proprietary,
high cell density, DMOS technology. These products
have been designed to minimize on-state resistance
while provide rugged, reliable, and fast switching
performance.These products are particularly suited for
low voltage, low current applications such as small
servo motor control, power MOSFET gate drivers, and
other switching applications.
Features
0.17 A, 100 V. RDS(ON) = 6@ VGS = 10 V
RDS(ON) = 10@ VGS = 4.5 V
High density cell design for extremely low RDS(ON)
Rugged and Reliable
Compact industry standard SOT-23 surface mount
package
DD
SOT-23
S
G
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
Parameter
VDSS
VGSS
ID
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1)
PD Maximum Power Dissipation
Derate Above 25°C
(Note 1)
TJ, TSTG
TL
Operating and Storage Junction Temperature Range
Maximum Lead Temperature for Soldering
Purposes, 1/16” from Case for 10 Seconds
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
SA
BSS123
7’’
GS
Ratings
100
±20
0.17
0.68
0.36
2.8
55 to +150
300
350
Tape width
8mm
Units
V
V
A
W
mW/°C
°C
°C/W
Quantity
3000 units
©2003 Fairchild Semiconductor Corporation
BSS123 Rev G(W)


Fairchild Semiconductor Electronic Components Datasheet

BSS123 Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

No Preview Available !

Electrical Characteristics
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min Typ Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
BVDSS
TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
IGSS Gate–Body Leakage.
VGS = 0 V,
ID = 250 µA
ID = 250 µA,Referenced to 25°C
VDS = 100 V, VGS = 0 V
VDS = 100 V,VGS = 0 V TJ = 125°C
VDS = 20 V, VGS = 0 V
VGS = ±20 V, VDS = 0 V
On Characteristics (Note 2)
VGS(th)
Gate Threshold Voltage
VGS(th)
TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID(on)
On–State Drain Current
gFS Forward Transconductance
VDS = VGS,
ID = 1 mA
ID = 1 mA,Referenced to 25°C
VGS = 10 V,
ID = 0.17 A
VGS = 4.5 V, ID = 0.17 A
VGS = 10 V, ID = 0.17 A, TJ = 125°C
VGS = 10 V,
VDS = 5 V
VDS = 10V,
ID = 0.17 A
Dynamic Characteristics
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
RG Gate Resistance
VDS = 25 V,
f = 1.0 MHz
V GS = 0 V,
VGS = 15 mV, f = 1.0 MHz
Switching Characteristics (Note 2)
td(on) Turn–On Delay Time
tr Turn–On Rise Time
td(off) Turn–Off Delay Time
tf Turn–Off Fall Time
Qg Total Gate Charge
Qgs Gate–Source Charge
Qgd Gate–Drain Charge
VDD = 30 V,
VGS = 10 V,
ID = 0.28 A,
RGEN = 6
VDS = 30 V,
VGS = 10 V
ID = 0.22 A,
Drain–Source Diode Characteristics and Maximum Ratings
IS Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
VGS = 0 V,
IS = 0.34 A(Note 2)
Voltage
trr
Diode Reverse Recovery Time
IF = 0.17 A,
Qrr Diode Reverse Recovery Charge diF/dt = 100 A/µs
100
0.8
0.68
0.08
97
1
60
10
±50
1.7 2
–2.7
1.2 6
1.3 10
2.2 12
0.8
73
7
3.4
2.2
1.7 3.4
9 18
17 31
2.4 5
1.8 2.5
0.2
0.3
0.17
0.8 1.3
11
3
V
mV/°C
µA
µA
nA
nA
V
mV/°C
A
S
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
A
V
nS
nC
NOTE:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 350°C/W when mounted on a
minimum pad..
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width 300 µs, Duty Cycle 2.0%
BSS123 Rev G(W)


Part Number BSS123
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Maker Fairchild Semiconductor
Total Page 6 Pages
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