FDV303N Datasheet, ON Semiconductor

* 25 V, 0.68 A Continuous, 2 A Peak
* RDS(ON) = 0.45 Ω @ VGS = 4.5 V
* RDS(ON) = 0.6 Ω @ VGS= 2.7 V
* Very Low Level Gate Drive Requirements Allowing Dire.

These N−Channel enhancement mode field effect transistors are produced using ON Semiconductor’s proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on−state resistance at low gate drive conditions. .