CDCLVD2106 Datasheet | Texas Instruments

.ti. SCAS902B - SEPTEMBER 2010 - REVISED JANUARY 2011 Dual 1:6 Low Additive Jitter LVDS Buffer Check for Samples: CDCLVD2106 Features - Dual 1:6 Differential Buffer - Low Additive Jitter: <300 fs rms in 10 k Hz - 20 MHz - Low Within Bank Output Skew of 45 ps (Max) - Universal Inputs Accept LVDS, LVPECL, LVCMOS - One Input Dedicated for Six Outputs - Total of 12 LVDS Outputs, ANSI EIA/TIA-644A Standard patible - Clock Frequency up to 800 MHz - 2.375- 2.625 V Device Power Supply - LVDS Reference Voltage, VAC_REF, Available for Capacitive Coupled Inputs - Industrial Temperature Range - 40°C to 85°C - Packaged in 6 mm x 6 mm 40-pin QFN (RHA) - ESD Protection Exceeds 3-k V HBM, 1-k V CDM APPLICATIONS - Telemunications/Networking - Medical Imaging - Test and Measurement Equipment - Wireless munications - General Purpose...