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ASM5CVF857 2.5V Wide-Range Frequency Clock Driver

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Description

August 2004 rev 1.2 2.5V Wide-Range Frequency Clock Driver (60MHz * 200MHz) ASM5CVF857 condition and perform the same low power .
This PLL clock buffer is designed for a VDD of 2.

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Datasheet Specifications

Part number
ASM5CVF857
Manufacturer
Alliance Semiconductor
File Size
266.17 KB
Datasheet
ASM5CVF857_AllianceSemiconductor.pdf
Description
2.5V Wide-Range Frequency Clock Driver

Features

* as Features
* www. DataSheet4U. com and when the PDB input is low. When the input frequency increases to greater than approximately 20MHz, the PLL will be turned back on, the inputs and outputs will be enabled, and the PLL will obtain phase lock between the feedback clock pair (FB_

Applications

* DDR Memory Modules / Zero Delay Board Fan Out. Provides complete DDR DIMM logic solution with ASM4SSTVF16857, ASM4SSTVF16859 & ASM4SSTVF32852. distributes a differential clock input pair (CLK_INT, CLK_INC) to ten differential pairs of clock outputs (CLKT[0:9], CLKC[0:9]) and one

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