CY7C1378B Datasheet (Cypress Semiconductor) - 9-Mbit (256K x 32) Pipelined SRAM

CY7C1378B, 9-Mbit (256K x 32) Pipelined SRAM

1] The CY7C1378B is a 3.3V, 256K x 32 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states.

The CY7C1378B is equipped with the advanced No Bus Latency™ (NoBL™) logic required to enable consecutive Rea

CY7C1378B Features

* Pin compatible and functionally equivalent to ZBT devices

* Internally self-timed output buffer control to eliminate the need to use OE

* Byte Write capability

* 256K x 32 common I/O architecture

* Single 3.3V power supply

* Fast clock-to-output tim