CY7C1421AV18, CY7C1417AV18 - 1.8V Synchronous Pipelined SRAM

Cypress Semiconductor

Datasheet Details

Part number	CY7C1421AV18, CY7C1417AV18
Manufacturer	Cypress Semiconductor
File Size	434.16 KB
Description	1.8V Synchronous Pipelined SRAM
Datasheet	CY7C1417AV18-CypressSemiconductor.pdf
Note	This datasheet PDF includes multiple part numbers: CY7C1421AV18, CY7C1417AV18. Please refer to the document for exact specifications by model.

36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36).
300-MHz clock for high bandwidth.
4-Word burst for reducing address bus frequency.
Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz.
Two input clocks (K and K) for precise DDR timing.
SRAM uses rising edges only.
Two input clocks for output data (C and C) to minimize clock-skew and flight-time mismatches.
Echo clocks (CQ and CQ) simplify data captu.

📁 CY7C1421AV18 Similar Datasheet

CY7C1460SV25 - 36-Mbit (1M x 36/2M x 18) Pipelined SRAM (Cypress)
CY7C1462SV25 - 36-Mbit (1M x 36/2M x 18) Pipelined SRAM (Cypress)
CY7C1006D - 1-Mbit (256K x 4) Static RAM (Cypress)
CY7C1011G - 2-Mbit (128K words x 16 bit) Static RAM (Cypress)
CY7C1041G - 4-Mbit (256K words x 16 bit) Static RAM (Cypress)
CY7C1041GE - 4-Mbit (256K words x 16 bit) Static RAM (Cypress)
CY7C1041GN - 4-Mbit (256K words x 16 bit) Static RAM (Cypress)
CY7C1049GN - 4-Mbit (512K words x 8 bit) Static RAM (Cypress)

Other Datasheets by Cypress Semiconductor

Published: Nov 6, 2016 |