CY7C1421AV18 Features
* 36-Mbit density (4M x 8, 4M x 9, 2M x 18, 1M x 36)
* 300-MHz clock for high bandwidth
* 4-Word burst for reducing address bus frequency
* Double Data Rate (DDR) interfaces (data transferred at 600 MHz) @ 300 MHz
* Two input clocks (K and K) for precise DDR t
CY7C1417AV18-CypressSemiconductor.pdf
Datasheet Details
CY7C1421AV18, CY7C1417AV18
Cypress Semiconductor
434.16 KB
1.8v synchronous pipelined sram.
This datasheet PDF includes multiple part numbers: CY7C1421AV18, CY7C1417AV18.
Please refer to the document for exact specifications by model.
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