CY7C1471BV25 Datasheet - Cypress Semiconductor

CY7C1471BV25 72-Mbit (2 M x 36) Flow-Through SRAM

CY7C1471BV25 Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles

* Supports up to 133 MHz bus operations with zero wait states

* Data transfers on every clock

* Pin compatible and functionally equivalent to ZBT™ devices

* Internally self timed output bu

Datasheet Details

CY7C1471BV25

Cypress Semiconductor

790.90 KB

72-mbit (2 m x 36) flow-through sram.

CY7C1471BV25 Distributor

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