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CY7C1471BV25 72-Mbit (2 M x 36) Flow-Through SRAM

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Description

CY7C1471BV25 72-Mbit (2 M × 36) Flow-Through SRAM with NoBL™ Architecture 72-Mbit (2 M × 36/1 M × 72) Flow-Through SRAM with NoBL™ Architecture Featu.

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Datasheet Specifications

Part number
CY7C1471BV25
Manufacturer
Cypress Semiconductor
File Size
790.90 KB
Datasheet
CY7C1471BV25-CypressSemiconductor.pdf
Description
72-Mbit (2 M x 36) Flow-Through SRAM

Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
* Supports up to 133 MHz bus operations with zero wait states
* Data transfers on every clock
* Pin compatible and functionally equivalent to ZBT™ devices
* Internally self timed output bu

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