CY7C1471BV33 - 72-Mbit (2 M x 36/4 M x 18) Flow-Through SRAM

Cypress Semiconductor

Datasheet Details

Part number	CY7C1471BV33
Manufacturer	Cypress Semiconductor
File Size	648.07 KB
Description	72-Mbit (2 M x 36/4 M x 18) Flow-Through SRAM
Datasheet	CY7C1471BV33-CypressSemiconductor.pdf

No bus latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.
Supports up to 133 MHz bus operations with zero wait states.
Data is transferred on every clock.
Pin compatible and functionally equivalent to ZBT™ devices.
Internally self timed output buffer control to eliminate the need to use OE.
Registered inputs for flow through operation.
Byte write capability.
3.3 V/2.5 V I/O supply (VDDQ).
Fast clock-to-output times.

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Other Datasheets by Cypress Semiconductor

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Published: Mar 13, 2017 |