CY7C1471BV33 - 72-Mbit (2 M x 36/4 M x 18) Flow-Through SRAM
CY7C1471BV33 Features
* No bus latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles
* Supports up to 133 MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin compatible and functionally equivalent to ZBT™ devices
* Internally self timed outp
