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CY7C1515KV18

(CY7C15xxKV18) 72-Mbit QDR II SRAM 4-Word Burst Architecture

CY7C1515KV18 Features

* Separate independent read and write data ports

* Supports concurrent transactions

* 333 MHz clock for high bandwidth

* Four-word burst for reducing address bus frequency

* Double data rate (DDR) interfaces on both read and write ports (data transferred at 666 MHz) at 333 MHz

CY7C1515KV18 General Description

The CY7C1526KV18, CY7C1513KV18, and CY7C1515KV18 are 1.8-V synchronous pipelined SRAMs, equipped with QDR II architecture. QDR II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicated data outputs to support read operati.

CY7C1515KV18 Datasheet (843.99 KB)

Preview of CY7C1515KV18 PDF

Datasheet Details

Part number:

CY7C1515KV18

Manufacturer:

Cypress Semiconductor

File Size:

843.99 KB

Description:

(cy7c15xxkv18) 72-mbit qdr ii sram 4-word burst architecture.

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CY7C1515KV18 CY7C15xxKV18 72-Mbit QDR SRAM 4-Word Burst Architecture Cypress Semiconductor

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