CY7C1511AV18 Datasheet - Cypress Semiconductor

CY7C1511AV18 - 72-Mbit QDR-II SRAM 4-Word Burst Architecture

The CY7C1511AV18, CY7C1526AV18, CY7C1513AV18, and CY7C1515AV18 are 1.8V Synchronous Pipelined SRAMs, equipped with QDR™-II architecture. QDR-II architecture consists of two separate ports: the read port and the write port to access the memory array. The read port has dedicated data outputs to suppor.

CY7C1511AV18 Features

* Configurations CY7C1511AV18

* 8M x 8 CY7C1526AV18

* 8M x 9 CY7C1513AV18

* 4M x 18 CY7C1515AV18

* 2M x 36 Separate independent read and write data ports

* Supports concurrent transactions 300 MHz clock for high bandwidth 4-word burst for reducing address bu

CY7C1511AV18_CypressSemiconductor.pdf