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CY7C1311JV18 (CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture

CY7C1311JV18 Description

18-Mbit QDR II SRAM 4-Word Burst Architecture .
The CY7C1311JV18, CY7C1911JV18, CY7C1313JV18, and CY7C1315JV18 are 1.

CY7C1311JV18 Features

* CY7C1311JV18/CY7C1911JV18 CY7C1313JV18/CY7C1315JV18 ® Configurations CY7C1311JV18
* 2M x 8 CY7C1911JV18
* 2M x 9 CY7C1313JV18
* 1M x 18 CY7C1315JV18
* 512K x 36 Separate Independent Read and Write Data Ports
* Supports concurrent transactions 300 MHz Cloc

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Datasheet Details

Part number
CY7C1311JV18
Manufacturer
Cypress Semiconductor
File Size
705.07 KB
Datasheet
CY7C1311JV18_CypressSemiconductor.pdf
Description
(CY7C1x1xJV18) 18-Mbit QDR II SRAM 4-Word Burst Architecture

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📌 All Tags

CY7C1x1xJV18 18-Mbit QDR SRAM 4-Word Burst Architecture Cypress Semiconductor
Cypress Semiconductor CY7C1311JV18-like datasheet