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CY7C1355C (CY7C1355C / CY7C1357C) 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

CY7C1355C Description

www.DataSheet4U.com PRELIMINARY CY7C1355C CY7C1357C 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL™ Architecture .
1] The CY7C1355C/CY7C1357C is a 3.

CY7C1355C Features

* No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles.
* Can support up to 133-MHz bus operations with zero wait states
* Data is transferred on every clock
* Pin compatible and functionally equivalent to ZBT™ devices
* In

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Datasheet Details

Part number
CY7C1355C
Manufacturer
Cypress Semiconductor
File Size
708.89 KB
Datasheet
CY7C1355C_CypressSemiconductor.pdf
Description
(CY7C1355C / CY7C1357C) 9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

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📌 All Tags

CY7C1355C CY7C1357C 9-Mbit 256K 512K Flow-Through SRAM Cypress Semiconductor
Cypress Semiconductor CY7C1355C-like datasheet