EM669325 - 4M x 32 Low Power SDRAM
Symbol Type Description CLK 4M x 32 LPSDRAM EM669325 Table 1.
Pin Details of 4Mx32 LPSDRAM Input Clock: CLK is driven by the system clock.
All SDRAM input signals are sampled on the positive edge of CLK.
CLK also increments the internal burst counter and controls the output registers.
Input Clo
EM669325 Features
* Clock rate: 133/125/100 MHz Fully synchronous operation Internal pipelined architecture Four internal banks (1M x 32bit x 4bank) Programmable Mode - CAS# Latency: 1, 2 & 3 - Burst Length: 1, 2, 4, 8, or full page - Burst Type: Sequential & Interleave - Burst-Read-Single-Write
* Burst stop fu
