FIN1048 Datasheet - Fairchild Semiconductor

FIN1048 3.3V LVDS 4-Bit Flow-Through High Speed Differential Receiver

This quad receiver is designed for high speed interconnect utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra low power dissipation even at h.

FIN1048 Features

* s Greater than 400Mbs data rate s Flow-through pinout simplifies PCB layout s 3.3V power supply operation s 0.4ns maximum differential pulse skew s 2.5ns maximum propagation delay s Low power dissipation s Power-Off protection s Fail safe protection for open-circuit, shorted and terminated condition

FIN1048 Datasheet (249.78 KB)