* Dual 1:5 differential clock distribution 30 ps maximum device skew Fully differential architecture from input to all outputs SiGe technology supports near-zero output skew Supports
MC100ES6210 Datasheet (250.73 KB)
MC100ES6210
Freescale Semiconductor
250.73 KB
Low voltage 2.5/3.3 v differential ecl/pecl/hstl fanout buffer.
Freescale Semiconductor Technical Data
MC100ES6210 Rev 3, 02/2005
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Low Voltage 2.5/3.3 V Differential ECL/PECL/HSTL Fanout Buffer.
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