MC100ES6220 - Low Voltage Dual 1:10 Differential ECL/PECL Clock Fanout Buffer

Product Overview

Freescale Semiconductor

Datasheet Details

Part number	MC100ES6220
Manufacturer	Freescale Semiconductor
File Size	320.81 KB
Description	Low Voltage Dual 1:10 Differential ECL/PECL Clock Fanout Buffer
Datasheet	MC100ES6220 Datasheet
Additional preview pages of the MC100ES6220 datasheet.

Product details

Description

AE SUFFIX 52-LEAD LQFP PACKAGE Pb-FREE PACKAGE CASE 1336A-01 The MC100ES6220 is designed for low skew clock distribution systems and supports clock frequencies up to 1 GHz.The device consists of two independent clock fanout buffers.The CLKA and CLKB inputs can be driven by ECL or PECL compatible signals.The input signal of each clock buffer is distributed to 10 identical, differential ECL/PECL outputs.If VBB is connected to the CLKA or CLKB input and bypassed to GND by a 10 nF capacitor, t

Features

Two independent 1:10 differential clock fanout buffers 130 ps maximum device skew SiGe technology Supports DC to 1 GHz operation of clock or data signals ECL/PECL compatible differential clock outputs ECL/PECL compatible differential clock inputs Single 3.3 V,.
3.3 V, 2.5 V or.
2.5 V supply Standard 52-lead LQFP package with exposed pad for enhanced thermal characteristic.

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Other Datasheets by Freescale Semiconductor

MC100ES6221 - Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer
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Published: Feb 24, 2010 |