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MC100ES6226 2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider

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Description

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Freescale Semiconductor, Inc.Order Number: MC100ES6226/D Rev 1, 12/2001 www.DataSheet4U.com 2.5/3.3V Differen.
MC100ES6226 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC up to 3.

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Datasheet Specifications

Part number
MC100ES6226
Manufacturer
Motorola
File Size
306.65 KB
Datasheet
MC100ES6226_Motorola.pdf
Description
2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider

Features

* Fully differential architecture from input to all outputs SiGe technology supports near-zero output skew Selectable 1:1 or 1:2 frequency outputs LVPECL compatible differential clock inputs and outputs LVCMOS compatible control inputs Single 3.3V or 2.5V supply Max. 35 ps maximum output skew (within

Applications

* that require a large number of outputs to drive precisely aligned clock signals. Using SiGe technology and a fully differential architecture, the device offers superior digitial signal characteristics and very low clock skew error. Target applications for this clock driver are high performance c l o

MC100ES6226 Distributors

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