* Fully differential architecture from input to all outputs SiGe technology supports near-zero output skew Selectable 1:1 or 1:2 frequency outputs LVPECL compatible differential clock inputs and outputs LVCMOS compatible control inputs Single 3.3V or 2.5V supply Max. 35 ps maximum output skew (within
MC100ES6226 Datasheet (306.65 KB)
MC100ES6226
Motorola
306.65 KB
2.5/3.3v differential lvpecl 1:9 clock distribution buffer and clock divider.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Freescale Semiconductor, Inc.Order Number: MC100ES6226/D
Rev 1, 12/2001 www.DataSheet4U.com
2.5/3.3V Differen.
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