MC100ES6226 - 2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider

Product Overview

Motorola

Part number	MC100ES6226
Manufacturer	Motorola
File Size	306.65 KB
Description	2.5/3.3V Differential LVPECL 1:9 Clock Distribution Buffer and Clock Divider
Datasheet	MC100ES6226 Datasheet
Additional preview pages of the MC100ES6226 datasheet.

MC100ES6226 is designed for very skew critical differential clock distribution systems and supports clock frequencies from DC up to 3.0 GHz.

es: Fully differential architecture from input to all outputs SiGe technology supports near-zero output skew Selectable 1:1 or 1:2 frequency outputs LVPECL compatible differential clock inputs and outputs LVCMOS compatible control inputs Single 3.3V or 2.5V supply Max. 35 ps maximum output skew (within output bank) Max. 50 ps maximum device skew Supports DC operation and up to 3 GHz (typ. ) clock signals FA SUFFIX 32.
LEAD LQFP.

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Other Datasheets by Motorola

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Published: Feb 24, 2010 |