Datasheet Details
| Part number | ICSSSTUB32864A |
|---|---|
| Manufacturer | ICS |
| File Size | 171.02 KB |
| Description | 25-Bit Configurable Registered Buffer |
| Datasheet |
 ICSSSTUB32864A_ICS.pdf
|
| Part number | ICSSSTUB32864A |
|---|---|
| Manufacturer | ICS |
| File Size | 171.02 KB |
| Description | 25-Bit Configurable Registered Buffer |
| Datasheet |
ICSSSTUB32864A_ICS.pdf
|
1:2 Register B (C0 = 1, C1 = 1) This 25-bit 1:1 or 14-bit 1:2 configurable registered buffer is designed for 1.7-V to 1.9-V VDD operation.All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS.All outputs are 1.8-V CMOS drivers that have been optimized to drive the DDR-II DIMM load.ICSSSTUB32864A operates from a differential clock (CK and CK#).Data are registered at the crossing of CK going high, and CK# going low.The C0 input controls
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