ICS9DB102 Datasheet - Integrated Circuit Systems

ICS9DB102 2 Output PCI Express Buffer

PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PLL_BW CLK_INT CLK_INC * *CLKREQ0# VDD GND PCIEXT0 PCIEXC0 VDD SMBDAT SMBCLK VDD PCIEXC1 PCIEXT1 GND VDD * *CLKREQ1# PIN NAME PIN TYPE IN IN IN IN PWR PWR OUT OUT PWR I/O IN PWR OUT OUT PWR PWR IN DESCRIPTION 3.3V input for selecting PLL .

ICS9DB102 Features

* 2 - 0.7V current mode differential output pairs (HSCL) Key Specifications:

* Cycle-to-cycle jitter < 35ps

* Output-to-output skew < 25 ps Features/Benefits:

* CLKREQ# pin for outputs 1 and 4/output enable for Express Card applications

* PLL or bypass mode/P

ICS9DB102_IntegratedCircuitSystems.pdf