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SY100EP451L, SY10EP451L 3.3V ECL 6-Bit Differential Register

SY100EP451L Description

SY10/100EP451L 3.3V ECL 6-Bit Differential Register with Master Reset General .
The SY10/100EP451L is a 6-bit fully differential register with common clock and single-ended Master Reset (MR).

SY100EP451L Features

* 450ps typical propagation delay Maximum frequency > 3.0GHz typical Asynchronous Master Reset 20ps skew within device, 35ps skew device-to-device PECL mode operating range:
* VCC = 3.0V to 3.6V with VEE

SY100EP451L Applications

* where a registered data path is necessary. All inputs have an internal 75k Ω pull-down resistor. Differential inputs have an override clamp. Unused differential register inputs can be left open and will default LOW. When the differential inputs are forced to < VEE +1.2V, the clamp will override and

📥 Download Datasheet

This datasheet PDF includes multiple part numbers: SY100EP451L, SY10EP451L. Please refer to the document for exact specifications by model.
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Datasheet Details

Part number
SY100EP451L, SY10EP451L
Manufacturer
Micrel Semiconductor
File Size
424.86 KB
Datasheet
SY10EP451L_MicrelSemiconductor.pdf
Description
3.3V ECL 6-Bit Differential Register
Note
This datasheet PDF includes multiple part numbers: SY100EP451L, SY10EP451L.
Please refer to the document for exact specifications by model.

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📌 All Tags

3.3V ECL 6-Bit Differential Register Micrel Semiconductor
Micrel Semiconductor SY100EP451L-like datasheet