SSTUB32868 - 1.8 V 28-bit 1 : 2 configurable registered buffer with parity

Name: SSTUB32868
SKU: SSTUB32868-677829

NXP

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Datasheet Details

Part number	SSTUB32868
Manufacturer	NXP
File Size	301.87 KB
Description	1.8 V 28-bit 1 : 2 configurable registered buffer with parity
Datasheet	SSTUB32868_PhilipsSemiconductors.pdf

SSTUB32868 Product details

Description

The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four (2R × 4) and similar high-density Double Data Rate 2 (DDR2) memory modules.

Features

28-bit data register supporting DDR2.
Supports 2 rank by 4 DIMM density by integrating equivalent functionality of two JEDEC-standard DDR2 registers (that is, 2 × SSTUA32864 or 2 × SSTUA32866).
Parity checking function across 22 input data bits.
Parity out signal.
Controlled multi-impedance output impedance drivers enable optimal signal integrity and speed.
Meets or exceeds SSTUB32868 JEDEC standard speed performance.
Supports up to.

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Other Datasheets by NXP

SSTUB32866 - configurable registered buffer
SSTU32864 - 1.8V confgurable registered buffer
SSTU32865 - 28-bit 1:2 registered buffer
SSTU32866 - 1.8V 25-bit 1:1 or 14-bit 1:2 confgurable registered buffer
SSTUA32864 - configurable registered buffer
SSTUA32866 - configurable registered buffer

Published: Jun 30, 2010 |