SSTU32865

28-bit 1:2 registered buffer

NXP

SSTU32865 Features

* s 28-bit data register supporting DDR2 s Fully compliant to JEDEC standard JESD82-9 s Supports 2 rank by 4 DIMM density by integrating equivalent functionality of two JEDEC-standard DDR2 registers (i.e. 2 × SSTU32864 or 2 × SSTU32866) s Parity checking function across 22 input data bits s Parity out

SSTU32865 General Description

The SSTU32865 is a 1.8 V 28-bit 1:2 register speciﬁcally designed for use on two rank by four (2R × 4) and similar high-density Double Data Rate 2 (DDR2) memory modules. It is similar in function to the JEDEC-standard 14-bit DDR2 register, but integrates the functionality of the normally required tw.

SSTU32865 Datasheet (178.11 KB)

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SSTU32865

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NXP ↗

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178.11 KB

Description:

28-bit 1:2 registered buffer.
www.DataSheet4U.com SSTU32865 1.8 V 28-bit 1:2 registered buffer with parity for DDR2 RDIMM applications Rev. 02

* 28 September 2004 Product .

📁 Related Datasheet

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SSTU32866 1.8V 25-bit 1:1 or 14-bit 1:2 confgurable registered buffer (NXP)

SSTUA32864 configurable registered buffer (NXP)

SSTUA32866 configurable registered buffer (NXP)

SSTUB32866 configurable registered buffer (NXP)

SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity (NXP)

SSTUH32864 1.8 V high output drive configurable registered buffer (NXP)

SSTUH32865 1.8V 28-bit high output drive 1:2 registered buffer (NXP)

SSTUH32866 1.8 V high output drive 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer (NXP)

SSTUM32865 1.8 V 28-bit 1 : 2 registered buffer (NXP)

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SSTU32865 28-bit registered buffer NXP

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SSTU32865 Features

SSTU32865 General Description

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